1. Field of the Invention
The present invention relates to a method of manufacturing a metal oxide semiconductor (MOS) transistor, and more particularly, to a method of manufacturing a transistor having improved reliability.
2. Description of the Related Art
Semiconductor devices have been rapidly developed for wide use in information processing devices such as computers. Therefore, these semiconductor devices are required to have a large storage capacity and a high operational speed. To meet market demands, semiconductor technology has been developed so that leading edge semiconductor devices have high integration density, good reliability and high response speed.
Semiconductor devices are typically categorized as memory devices and non-memory devices. The memory devices include a random access memory (RAM) and a read only memory (ROM) device. A RAM device, such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), has a rapid data input and output speed. However, the RAM device is volatile because the data stored in its memory can dissipate with the passage of time. On the other hand, an ROM device, including a logic device maintains the data stored therein. However, the ROM device has a slower data input and output speed.
Semiconductor devices generally includes at least one transistor in a given cell region. Each cell region of the semiconductor device operates in accordance with the operational characteristics of each transistor located in that cell region. Accordingly, the operational characteristics of the transistor becomes more important in the design of the semiconductor device. Also, the reliability of the semiconductor device depends upon whether or not the transistor sufficiently meets its design specifications. As the semiconductor devices become more highly integrated, the size of the transistors employed is greatly reduced. Moreover, unexpected failures may occur during the fabrication of the transistor due to the size reduction efforts by the manufacturer. Such failures may have fatal effects on the reliability of the semiconductor.
Referring to FIGS. 1A and 1C, which illustrates a conventional method of producing a transistor device, after a semiconductor substrate 10 is divided into an active region and a field region, 10a several gate structures 16 are formed on the semiconductor substrate 10. Each of the gate structures 16 includes a gate oxide film pattern 12 and a polysilicon pattern 14.
A re-oxidation film 18 is formed to a uniform thickness on the gate structures 16 and on the substrate 10 to cure damage to the gate structures 16 and the substrate 10 generated during the formation of the gate structures 16.
Referring to FIG. 1B, a mask pattern 20 is formed on the substrate 10 so that the mask pattern 20 exposes a portion of the substrate 10 where a transistor is formed. The mask pattern 20 is generally formed using a photoresist.
Then, impurities 24 are implanted at a low concentration into a portion of the substrate 10 as shown using the mask pattern 20 and the gate structures 16 as ion implanting masks. Here, the depth (D1) to which the impurities 24 are implanted into the substrate 10, measured from the surface of the substrate 10 to the full extent of the implanted impurities, is approximately 100 to 500 Å. The region where the impurities 24 are implanted then becomes a source or a drain region 22 of the transistor.
Referring to FIG. 1C, a rinsing process is executed for rinsing the remaining substrate 10 and for removing the mask pattern 20. When the rinsing process is performed with respect to the substrate 10. A portion of the substrate 10 may also be etched to a predetermined thickness, thereby forming a recess 26 in the substrate 10. As the recess 26 is generated in the substrate 10, the depth (D2) of the source or the drain region 22a correspondingly decreases. More specifically, the reduction of the depth (D2) of the source or the drain region 22a caused by the formation of the recess 26 seriously effects the more shallow depth of the region where the impurities are implanted, with a corresponding reduction in the length of the gate for purposes of complying with a reduction in the design rule. When the depth (D2) of the source or the drain region 22a is decreased due to the recess 26 on the substrate 10, the impurity concentration in the source or the drain region 22a can also be reduced, thereby increasing the electrical resistance of the transistor. In addition, because the reduction of the depth (D2) of the source or the drain region 22a may not be uniform throughout the entire surface of the substrate 10, excessive deviations between respective transistors formed on the substrate may occur.
To prevent the generation of recess 26 on the substrate 10, a thickness of the re-oxidation film 18 may be increased as shown in FIG. 2. However, unwanted bird beaks (A) may be generated at both end portions of the gate structure 16 during the formation of the re-oxidation film 18 having a thickness thick. When the thickness of the gate oxide film pattern 12 is increased in accordance with the bird beaks (A), the threshold voltage of the transistor may increase due to the increase in the thickness of the gate oxide film pattern 12. The re-oxidation film 18 cannot be further thickened because that in turn will make the bird beaks (A) thicker.